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Security & Cryptography·DatasheetProduction Ready
SHA-256
SHA-256 with a worked size-vs-speed optimization path.
Overview
A SHA-256 hashing core written straight from the standard, shipped in three implementations - basic, ROM-optimized, and shift-register - that demonstrate the C⏚ optimization workflow end to end (a 4× size reduction from the basic version, with fewer muxes and simpler logic).
Key features
- -Three implementations: basic, ROM-optimized, shift-register
- -Written straight from the standard specification
- -4× size reduction from basic to optimized
- -Fewer muxes / simpler logic in the optimized variant
- -A worked example of the C⏚ optimization workflow
Standards
- -FIPS 180-4 (SHA-256)
Interfaces
| Input | Message block stream |
|---|---|
| Output | 256-bit digest |
| Variants | basic / ROM-opt / shift-register |
Performance
| Digest | 256-bit |
|---|---|
| Throughput | Variant-dependent - available on request |
Resource utilization
| LUTs / logic cells | Available on request |
|---|---|
| Registers (FF) | Available on request |
| Block RAM | Available on request |
| Max clock (fMAX) | Available on request |
Verification
- -Validated against FIPS-180-4 test vectors
Deliverables
- -C⏚ source (readable, modifiable)
- -Generated synthesizable Verilog (VHDL on request)
- -Self-checking testbench
- -Integration guide + this datasheet
- -Email integration support (per license tier)
Typical applications
- -Integrity / authentication
- -Secure boot
- -Blockchain / PoW experimentation
- -Teaching HW optimization
Licensing
Single-project or perpetual; all three variants included. Quoted per use.
Pricing is quoted per use (single project, perpetual, volume, support tier). Each license includes the full C⏚ source, generated HDL, a self-checking testbench, and integration support.
Neosyn · neosyn.io - Specifications subject to change. Resource and timing figures marked “available on request” are provided per target device on enquiry.