Ethernet MAC
Hardware-only 10/100/1000 Ethernet MAC - silicon-proven.
Overview
A complete Ethernet Media Access Control layer in pure hardware: no soft CPU, no firmware. Full-duplex 10/100/1000 Mbps with auto-negotiation over an MII/GMII PHY interface, an integrated receive buffer with frame filtering, and clean streaming interfaces on the client side. Proven on real silicon (Lattice ECP3 Versa + a Marvell PHY) and already licensed into a shipping product.
Key features
- -Full-duplex operation at 10 / 100 / 1000 Mbps
- -100% hardware operation - no processor or firmware needed
- -Auto-negotiation, MII and GMII PHY interfaces
- -FPGA-proven on Lattice ECP3 Versa with a Marvell 88E1119R PHY
- -2 KB receive buffer with on-the-fly frame filtering
- -Drops malformed frames (no preamble, length errors, bad CRC)
Standards
- -IEEE 802.3 (Ethernet)
- -MII / GMII media-independent interface
- -Clause 28 auto-negotiation
Interfaces
| PHY side | MII / GMII (10/100/1000) |
|---|---|
| Client side | Streaming TX/RX with handshake |
| Receive buffer | 2 KB, frame-filtered |
| Clocking | Single MAC clock + PHY-derived clocks |
Performance
| Line rate | 10 / 100 / 1000 Mbps, full-duplex |
|---|---|
| Throughput | Wire-speed (line-rate, no CPU bottleneck) |
| Latency | Available on request |
Resource utilization
| LUTs / logic cells | Available on request |
|---|---|
| Registers (FF) | Available on request |
| Block RAM | Available on request |
| Max clock (fMAX) | Available on request |
Verification
- -Hardware-validated on a Lattice ECP3 Versa board with a Marvell 88E1119R PHY
- -Bring-up against real link partners (auto-neg, full-duplex)
- -Bad-frame filtering exercised (preamble / length / CRC)
Deliverables
- -C⏚ source (readable, modifiable)
- -Generated synthesizable Verilog (VHDL on request)
- -Self-checking testbench
- -Integration guide + this datasheet
- -Email integration support (per license tier)
Typical applications
- -Embedded networking without a CPU
- -Industrial / control links
- -Data acquisition
- -Custom protocol offload
Licensing
Single-project or perpetual site license; source-included. Quoted per use (project, volume, support).
Pricing is quoted per use (single project, perpetual, volume, support tier). Each license includes the full C⏚ source, generated HDL, a self-checking testbench, and integration support.
Neosyn · neosyn.io - Specifications subject to change. Resource and timing figures marked “available on request” are provided per target device on enquiry.