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Processors·DatasheetAvailable

Intel 8088

An 8088-compatible core in readable C⏚ - retro & education.

Request licensing & pricingDownload datasheet (PDF)From $1,000 · source included

Overview

A partial Intel 8088 processor implemented in C⏚ - a clean, readable CPU you can actually follow, aimed at retro-computing builds and as a teaching vehicle for processor design. Also serves as the reference CPU that gates the Neosyn compiler.

Key features

  • -Partial 8088 instruction set (real-mode subset)
  • -Designed for retro-gaming / retro-computing builds
  • -A teaching tool for processor & datapath design
  • -Written in readable, traceable C⏚

Standards

  • -Intel 8088 ISA (partial, real-mode subset)

Interfaces

Bus8088-style memory bus
MemoryExternal RAM/ROM

Performance

ISA coveragePartial real-mode subset (see manual)
ClockAvailable on request

Resource utilization

LUTs / logic cellsAvailable on request
Registers (FF)Available on request
Block RAMAvailable on request
Max clock (fMAX)Available on request

Verification

  • -Instruction-level test suite
  • -Runs demo programs (e.g. iterative Fibonacci) end to end

Deliverables

  • -C⏚ source (readable, modifiable)
  • -Generated synthesizable Verilog (VHDL on request)
  • -Self-checking testbench
  • -Integration guide + this datasheet
  • -Email integration support (per license tier)

Typical applications

  • -Retro-computing / retro-gaming
  • -Processor-design education
  • -SoC bring-up reference

Licensing

Single-project or perpetual; source-included. Quoted per use.

Pricing is quoted per use (single project, perpetual, volume, support tier). Each license includes the full C⏚ source, generated HDL, a self-checking testbench, and integration support.

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Neosyn · neosyn.io - Specifications subject to change. Resource and timing figures marked “available on request” are provided per target device on enquiry.